PTL 1 discloses, in a multi-processor system where a plurality of processors share a single system bus, installing a system bus control apparatus which manages usage status of a plurality of buses and grants permission to use the system bus, installing means for selecting and using a plurality of buses in the processing units, configuring the system bus of an instruction-dedicated shared bus used for data transfer related to instruction fetch and an operand-dedicated shared bus used for data transfer related to operand read and write, installing an instruction shared bus control apparatus and an operand shared bus control apparatus are installed, and the like for the purpose of solving the performance deterioration caused by the competition of access from a plurality of processing units in the system bus, achieving high throughput by a small amount of hardware, and the like.